Hybrid Pixel Detectors
ASI makes use of Medipix3 and Timepix3 hybrid pixel detectors. This technology is developed at CERN as fundamental technology for ultrafast and ultrasensitive particle detectors. Hybrid pixel detector consist of a sensor material and readout electronics (often called the Chip).
The sensor material can be adapted to the type of radiation so that we can manufacture dedicated detectors for each experiment. Common sensor materials are Si, GaAs and CdTe.
The sensor material is bump-bonded to the chip in a cleanroom process. The bonding process defines the pixel size of the sensor, usually 55 µm.
CERN currently has licensed Medipix3 and Timepix3 for commercial use. Timepix4 will presumably become available in 2026.
Direct Detection and Particle Counting Principle
Every particle hit (photon, electron, X-Ray or ion) on the sensor surface generates a charge cloud of electron-hole pairs. Due to the polarization bias voltage the electron-hole pairs are collected at the bump-bond junction (the pixel contact). The analogue electronic is capable to record the charge at the junction and convert this into a digital signal.
The high amplification of the sensor allows to define a lower threshold and eliminating all intrinsic noise of the sensor. This enables the chip to perform particle counting instead of charge integration, leading to noise-free datasets. The direct conversion of particles into electronic signals is highly efficient, therefore hybrid pixel detectors are much more sensitive than other indirect detectors (e.g. CCD).
Medipix3 chips can define up to 8 different thresholds so that the chip can also be used to perform energy-resolved detection (e.g. for X-rays or gamma radiation).
Medipix3 and Timepix3
Both Medipix3 and Timepix3 chips have identical geometrical dimensions with 55 µm x 55 µm square pixels in an array of 256×256 pixels. The chip is 3-side buttable, i.e. the chip is suitable to build gap-less detectors of infinite length with a width of 512 pixels.
Both chips are designed with respect to radiation hardness and will not deteriorate even under extreme beam conditions (Giga eV).
After the bump-bonding to the sensor, the chip is placed on dedicated chipboard. The chipboard usually is designed for a specific experiment or application (e.g. for advanced TEM or neutron detection).
The chipboard is then connected to the readout electronics either via a PCB or a flexible flat cable.
The readout electronics delivers data via TCP/UDP to a standard Ubuntu workstation.
Medipix3 chips are designed for particle counting with high frame rates. Particle counting means that the number of particle hits is counted in a defined timeframe as intensity data. The chip delivers full frame intensities with a frame rate of up to 2000 frames per second.
The chip supports sophisticated charge summing and charge arbitration to reduce point spread and cross-talk. Thanks to the thresholding capability the data is noise-free.
The chip can be operated at different speeds. Higher speeds of up to 10000 frames per second are achieved by reducing the signal bit depth (see table on the right).
The operation mode of the chip is comparable to other frame-based detector modes such as conventional CMOS or CCD cameras – but with vastly improved speed, sensitivity, and dynamic range.
Timepix3 is a radically different detection chip. Unlike frame-based camera concepts where data is only generated in pre-defined intervals (the ‘frame’), the Timepix3 chip generates data immediately after a particle hit.
The Timepix3 is therefore an event-counting detector where events can be differentiated with a time resolution of 1.56 nanoseconds. Every particle hit generates this information:
- ToA = Time of Arrival: defined as the time of signal level raising over the electronic threshold.
- ToT = Time over Threshold: representing the amount of charge deposited in the pixel – correlated to the energy of the particle.
- X,Y = Pixel coordinates
The Timepix3 chip has an intrinsic time resolution of 1.56 nanoseconds, i.e. the detector can record events with a theoretical frame rate of up to 640 million frames per second (= 1 / 1.56 ns).
The maximum achievable hit rate of one chip is defined by the readout electronics and is currently limited to 80 million hits per second.
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